As computer hardware and software technology continues to progress, the need for larger and faster mass storage devices for storing computer software and data continues to increase. Electronic databases and computer applications such as multimedia applications require large amounts of disk storage space. An axiom in the computer industry is that there is no such thing as enough memory and disk storage space. Mass storage device manufacturers strive to produce high speed hard disk drives with large data capacities at lower and lower costs.
In general, mass storage devices and systems, such as hard disk drives, include a magnetic storage media, such as rotating disks or platters, a spindle motor, read/write heads, an actuator, a pre-amplifier, a read channel, a write channel, a servo circuit, and control circuitry to control the operation of the hard disk drive and to properly interface the hard disk drive to a host system or bus. Hard disk drives typically perform read operations by locating appropriate sectors on the disk platters and reading the data that has been previously written to the disk. The read/write heads of the hard disk drive generally comprise a magneto-resistive element, which senses changes in the magnetic flux of the disk platter and generates a corresponding analog read signal. These analog signals are typically passed to a preamplifier circuit and, then, onto a read channel for conditioning, decoding and formatting of the analog signal.
The bandwidth of the system is typically limited by the lead inductance associated with the magneto-resistive read/write head. The limited bandwidth is attributable to a pole caused by the combination of the resistance and lead inductance of the magneto-resistive read/write head, which causes a roll off in the system's frequency response.
One approach to increasing the bandwidth of a hard disk drive is to introduce a zero at a frequency corresponding to the pole due to the lead inductance of the magneto-resistive element. One method of locating such a compensating zero is to implement two stages of differential amplifiers, a forward gain stage and a reverse gain stage. The gain stages are configured, such that, at low frequencies, the reverse gain stage suppresses the gain of the combination. The reverse gain stage is designed to roll-off at a particular frequency. This frequency is chosen to correspond to the pole due to the lead inductance of the magneto-resistive element. When the reverse gain stage begins to roll-off, it begins to stop suppressing the forward gain stage, effectively creating a zero in the frequency response of the combination. This zero is intended to compensate for the pole caused by the lead inductance of the magneto-resistive element and, therefore, extend the bandwidth of the system.
A problem with this approach is that typical magneto-resistive elements exhibit tolerances of up to 30 percent. In addition, actual values of magneto-resistive elements may vary with the operating temperature. Variations in the actual value of the magneto-resistive element cause corresponding variations in the location of the lead inductance pole. This approach suffers from the fact that the compensating zero is static. That is, this approach contemplates creating a compensating zero for a known, fixed value of the magneto-resistive element. Variations in actual component values may, therefore, result in mismatches between the lead inductance pole and the compensating zero, creating undesirable peaks and valleys in the system's frequency response. In addition, the compensating zero in this system is typically dependent on the base/emitter capacitance of the transistors in the reverse gain stage. This parameter is not well controlled, which further complicates accurate placement of the compensating zero.
Another approach to creating a compensating zero is to use two gain stages, where the inputs of the second gain stage are coupled to the outputs of the first gain stage. A network of resistors are coupled to the emitters of the second gain stage, with a capacitor coupled in parallel with a portion of the emitter resistance. At a particular frequency, chosen to counteract the lead inductance pole, the capacitor begins to short out a portion of emitter resistance, causing a reduction in the total emitter resistance, and an increase in the gain of the second gain stage. This creates a zero, which is intended to counteract the lead inductance pole and increase the system's bandwidth. Like the previous approach, the compensating zero is static, and unable to compensate for variations in the location of the lead inductance pole due to component tolerances and changing operating temperatures.